Verification Engineer

 
Location: Raleigh, North Carolina
Posted On: 7/7/2017
Job Code: 1952467_4399
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Job Description
 
Minimum Qualifications:
1-5 years of experience in the following:
- Design and/or verification experience on a CPU (especially RISC).
- Knowledge of CPU architecture and use of assembly language (especially RISC).
- Ability to debug Verilog RTL in a System Verilog/UVM environment
- Prior use of industry standard simulators and waveform debuggers
- Perl
- Competent use of Unix/Linux command line and scripting
- Develop testbenches for verification of the CPU
- Support Post Silicon verification and bring up

Education:
Required: Bachelor's, Computer Engineering and/or Electrical Engineering
Preferred: Master's or equivalent experience
Category:IT  code:new
 
 
Job Requirements
 
 
verification, UVM, Verilog
 

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Yameen
 
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