FPGA Platform Development/Post-Si Validation Engin

 
Location: San Diego, California
Posted On: 6/15/2017
Job Code: 516-FPGA
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Job Description
 
• We are looking to add to our Mixed Signal Product Development and Test Engineering team.
• Analog and Mixed-Signal Team PDTE team is responsible for post silicon mixed signal intellectual property (IP) and SOC lab bring up and characterization.
• This position requires someone who has experience in FPGA design, Verilog/System Verilog coding and RTL design and simulation.
• Responsibilities includes defining and development of test methodologies and characterization of high speed interface design and Serial & Parallel Communication protocols like I2C, SPI, JTAG, AXI, PCIe etc in the context of FPGAs and the verification of such designs.
• The engineer is expected to have a thorough understanding of complex FPGA designs using Xilinx and/or Altera FPGA devices.
• The position requires the engineer to handle sub-system/micro-architecture design based on specifications.

Minimum Qualification:
• Minimum 2+yrs of relevant experience in FPGA design.
• Strong experience in Verilog/System Verilog coding and RTL design & Simulation .
• Experience in hands on high speed signal measurements for standard interfaces (SERDES, PCIe, USB, SPI, JTAG etc) is a plus.

Preferred Qualification:
• Silicon lab debug experience using common lab equipment such as Spectrum analyzers, oscilloscopes, logic analyzers and network analyzers.
• Knowledge and understanding with modifying LabVIEW test software.
• SERDES Knowledge

Education:
• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering
Category:IT  code:new
 
 
Job Requirements
 
 
• Minimum 2+yrs of relevant experience in FPGA design.
• Strong experience in Verilog/System Verilog coding and RTL design & Simulation .
 

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Contact Details
 
Recruiter
Shrey Sharma
 
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E-mail Address
 
LinkedIn
linkedin.com/in/shreysharma1