Senior Member of Technical Staff - Hardware Engine

 
Location: San Diego, California
Posted On: 4/17/2017
Job Code: SrTechStaff-Hardware
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Job Description
 
•The project manager for the IP Foundation and Process Technology will be responsible for interfacing with Process team, VLSI Technology to drive foundry deliverables and resolve any issues
•Expert in process nodes and be able to drive process technology challenges to resolution
•Expertise with circuit design and library developments, including STD cell, Memory, I/O and custom cell, Sensors to drive IPs deliverables and resolve any integration issue with SOC team
•Driving PDN methodology and low power mythology
•Drive various AUC knobs including Corners definition, library Tracks, Metal stack. etc
•This position requires experienced in Spice simulation, Layout and PD verification flow, Chip and/or block level integration experience using foundation IP Deep understanding of silicon process manufacturing process and DFM implementation for maximum yield.
•Familiarity with IP Physical verification: LVS, DRC, ERC tools and checks for IP integration Understanding power supply/regulatory requirements and IR/EM issues/checks for IP integration Responsible for driving Yield issue and debug to resolution.

Minimum Qualifications:
•Technical Domain expert industry experience in ASIC design flow cycle from RTL to GDS delivery.
•Broad Technical expertise across FND IP development and , Tech process and methodology , Experience with Design, Synthesis, DFT, Physical Design and IP Validation is a Plus Technical Leadership
•Proven leadership in a technical and/or program management role
•Strong communication skills
•Experienced in providing regular executive level communication Proven excellent negotiation skills, dealing and resolving difficult and complex situations
•Self driven, Motivated with strong mentoring record Has worked in and/or built large teams with proven mentor record in previous organizations
•Ability to influence senior business managers on key project goals setting Process improvement/ Infrastructure development
•Prior experience in process improvement and/or infra development with a goal to deploy/improve decisions based on data analysis Risk management
•Must be able to proactively drive and solve problems to solutions

Education:
•Preferred: Master's, Electrical Engineering
•Required: Bachelor's, Electrical Engineering
Category:IT  code:new
 
 
Job Requirements
 
 
•Technical Domain expert industry experience in ASIC design flow cycle from RTL to GDS delivery.
•Broad Technical expertise across FND IP development and , Tech process and methodology , Experience with Design, Synthesis, DFT, Physical Design and IP Validation is a Plus Technical Leadership
•Proven leadership in a technical and/or program management role
•Ability to influence senior business managers on key project goals setting Process improvement/ Infrastructure development
 

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Contact Details
 
Recruiter
Shrey Sharma
 
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E-mail Address
 
LinkedIn
linkedin.com/in/shreysharma1