Circuit Design Verification Engineer

 
Location: San Diego, California
Posted On: 9/7/2017
Job Code: 8380
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Job Description
 
• Applicant will do design/validation of digital and mixed-signal sensor IP in SoC, which includes design verification, spice modeling/simulation, verilog/RTL modeling & simulation, IP integration, scripting for automation.
• The candidate must have a proven record of design verification in advanced CMOS process technologies for volume production.
• Work as part of the IP design team to enable sensor IPs in advanced SOC. Handle spice/Verilog simulations of sensor IP.
• Participate in digital circuit design (RTL).
• Enhance IP characterization/validation by using automation to optimize the flow.
• Support IP release and integration in SOC design.

Minimum Qualification:
• 3+ years of industrial experience in CMOS digital design (RTL)/validation.
• Hands on experience running Spice/verilog simulation are required.
• Familiar with IP verification flow/tools. Proficiency in unix scripting.
• Knowledge of custom layout extraction in Cadence environment
• Excellent in communication and good team player.
• Education, BSEE or higher.

Preferred Qualification:
• Excellent communication skills

Education:
• Required: Bachelor's, Electrical Engineering
• Preferred: Master's
Category:IT  code:new
 
 
Job Requirements
 
 
• 3+ years of industrial experience in CMOS digital design (RTL)/validation.
• Hands on experience running Spice/verilog simulation are required.
• Familiar with IP verification flow/tools. Proficiency in unix scripting.
• Knowledge of custom layout extraction in Cadence environment
 

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Contact Details
 
Recruiter
Shrey Sharma
 
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E-mail Address
 
LinkedIn
linkedin.com/in/shreysharma1