Digital Verification Engineer

Location: San Jose, California
Posted On: 8/7/2017
Job Code: 1957579_VE
Job Description
Job Description:
• Develop Verification Infrastructure and tests using SystemVerilog UVM and Formal for wireless protocols including Bluetooth, Zigbee, NFC.

Minimum Qualifications:
• Experience with pre-silicon design and verification languages, processes, tools and techniques including SystemVerilog,
• SystemVerilog Assertions, assertion-based verification, protocol verification, test planning, constrained-random UVM testbench design, simulation, functional coverage closure, scripting in Perl/Python, waveform and interactive debug.

Preferred Qualification:
• Knowledge of wireless networking protocols; AMBA, AXI, AHB protocols; signal processing;

• Required: Bachelor's, Computer Engineering and/or Electrical Engineering
• Preferred: Master's, Computer Engineering and/or Electrical Engineering or equivalent experience
Category:IT  code:new
Job Requirements
Engineering, Python, Perl, Wireless, Networking

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Contact Details
Satthiseelan Pr